Sequential logic Circuit

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 Sequential Logic Circuit

Sequential Logic is a combinational logic with memory. 

This means that sequential logic circuits are able to take into account their previous input state as well as those actually present

Output can vary based on input. 

This type of circuits uses previous input, output, clock and a memory element.












There are 2 types

          1) Synchronous types  run with same different pulse

               S - R Latch

        2)  Asynchronous types run with same clock pulse

              S - R Flip Flop


S - R Latch

S-R Latch Using NOR Gate

What is S-R Latch and explanation




Create a Circuit & Simulate






S-R Latch Using NAND Gate 



Circuit


Truth Table


 Case 1: R = 1 & S = 1

When both the S and R inputs are HIGH, the output remains in previous state  it holds the previous data.

Case 2: R = 1 & S = 0

When R input is HIGH and S input is LOW, the flip flop will be in SET state. As R is HIGH, the output of NAND gate B , Q becomes LOW. This causes both the inputs of NAND gate A to become LOW and hence, the output of NAND gate A i Q becomes HIGH.

Case 3: R = 0 & S = 1

When R input is LOW and S input is HIGH, the flip flop will be in RESET state. As S is HIGH, the output of NAND gate A  Q becomes LOW. This causes both the inputs of NAND gate B to become LOW and hence, the output of NAND gate A i.e., Q becomes HIGH.

Case 3: R = 0 & S = 0

When both the R and S inputs are LOW, the flip flop will be in undefined state. Because the low inputs of S and R, violates the rule of flip – flop that the outputs should complement to each other. So, the flip flop is in undefined state (or forbidden state).

                 Create Circuit & Simulate
    


S - R Flip Flop 

S-R stands for SET and RESET. 

The SET input 'S' set the device or produce the output 1, and the RESET input 'R' reset the device or produce the output 0

 This can also be called RS flip-flop. Difference is RS is inverted SR flip-flop.

Any flip flop can be build using logic gates. NAND and NOR gates were used as they are universal gates.

S - R Flip Flop using NAND Gate


Use 2 NAND Gates




Truth Table




How to Create & Simulate 


 






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